1. Technical Field
Embodiments of the present disclosure generally relate to a semiconductor system including a semiconductor device.
2. Related Art
Some packaging technologies for placing a high capacity memory and a controller into the same package include an SiP (System in Package) packaging technology and a CoC (Chip on Chip) packaging technology. The SiP packaging technology adopts a scheme whereby chips are electrically coupled through wire bonding. The CoC packaging technology is most advantageous for realizing the high integration of a memory and for realizing a high speed operation between a memory and a controller. This is because the memory and the controller transmit signals including data to each other through micro bump pads.
Since the diameter of a micro bump pad can be only several tens of micrometers, properties such as resistance, inductance and parasitic capacitance are low. Thus, these properties may it easier to increase an operation frequency. Therefore, the transmission speed of the data may be easily improved by a method of increasing the number of micro bump pads. In the CoC packaging technology, micro bump pads are formed on the memory and the controller. Because the micro bump pads formed on the memory and the controller are electrically coupled with each other, the memory and the controller are formed as one chip.
In a semiconductor device, in order to ensure the performance of a buffer through which data is inputted and outputted or a driver, a data input/output test may be performed. In the case where the test is performed for a semiconductor device and a semiconductor system in which the CoC packaging technology is used, data may be inputted and outputted through micro bump pads.